Computer engineering portfolio

Vlad Vinebuilds at the bit level.

I design digital hardware from low-level logic to complete systems—RTL, computer architecture, embedded platforms, PCB design, and experimental instrumentation.

ARCHITECTURE / 01ACTIVE
4-BITCPU // IN PROGRESS
FocusRTL · ASIC · SoC
StackVerilog · KiCad
2028Expected B.S. graduation
65%Custom keyboard PCB designed
4-bitCustom CPU in development
Selected work

Projects that turn theory into hardware.

A growing record of board design, RTL, computer architecture, and research. Use the filters to focus the work.

01 / PCB + EmbeddedDesign complete

Custom 65% USB-C Mechanical Keyboard

Designed an end-to-end keyboard around the ATmega32U4, including a 5×15 key matrix, per-key diodes, USB-C protection and power circuitry, clocking, reset, and programming access.

Delivered a clean KiCad design with manufacturer-ready Gerbers, BOM, placement data, and a matching case workflow.

KiCadATmega32U4USB-CPCB DRCOnshape
02 / ArchitectureIn progress

Custom 4-Bit CPU

Designing a processor from the ground up with an ALU, registers, program counter, instruction decoder, control logic, memory interface, and a compact custom instruction set.

Building and testing the datapath module by module before integrating a full fetch–decode–execute system.

VerilogDigital LogicCustom ISASimulationCPU Design
03 / FPGARTL system

Smart Environment Controller

Built a Verilog control system for an Intel MAX 10 target that combines temperature regulation, ambient-light response, and an armed motion-detection mode.

Mapped sensor inputs to deterministic fan, heater, LED, buzzer, and alarm behaviors in a compact modular RTL design.

VerilogFPGAIntel MAX 10SensorsControl Logic
04 / Research2026—present

Quantum Materials & EPR Instrumentation

Supporting research on erbium-doped crystal spin systems for potential microwave quantum-memory applications, with emphasis on electrical instrumentation and measurement systems.

Contributing to RF/microwave characterization, sensors, data collection, signal processing, automation, and background-noise analysis.

RF / MicrowaveEPRSensorsSignal ProcessingPython
KiCad PCB layout of Vlad Vine's custom 65 percent mechanical keyboard
Design archive

Explore the routed board.

The complete KiCad source includes the electrical schematic, project configuration, and routed PCB layout shown here.

ControllerATmega32U4
Matrix5 × 15
InterfaceUSB-C
Board2-layer PCB

592 KB ZIP · KiCad project, schematic, layout, and readme

About

Hardware-minded. Systems-oriented.

I’m a Computer Engineering student focused on the layers where software becomes physical: digital logic, processors, embedded systems, boards, signals, and semiconductor design.

I like projects that force me to understand the whole stack, from a datasheet and schematic to verification, manufacturing, and the behavior of a finished system.

Based in Tampa, Florida
Studying Computer Engineering at the University of Utah
Expected graduation: May 2028

Undergraduate Research Assistant

Quantum-materials and EPR research involving RF/microwave characterization, low-temperature measurements, sensors, automation, and signal analysis.

Green Medical Network Group · Intern

Researched healthcare technology, innovation, and competitive strategy, then presented technical and business recommendations to leadership.

Software Developer · Stealth

Developed C# programming, technical collaboration, and problem-solving experience that now complements hands-on hardware work.

Hardware

Verilog, RTL, FPGA, PCB design, embedded systems, digital logic, computer architecture

Software

Python, C, C++, C#, SQL, Git, Linux, APIs, CI/CD

Tools

KiCad, LTspice, MATLAB, Onshape, Docker, lab instrumentation

What’s next

A portfolio designed to keep growing.

Current work stays honest about its status; future work moves here first, then into the main project grid when it is ready.

Complete and verify the 4-bit CPU

Finish integration, document the ISA, publish waveforms, and demonstrate programs running through the full datapath.

Build toward a RISC-V core

Move from a compact custom CPU to an RV32I subset, then explore pipelining, forwarding, hazards, and FPGA synthesis.

Show measurable engineering results

Add timing, utilization, verification coverage, performance, diagrams, and design decisions to every future project.

Contact

Let’s build something close to the hardware.

I’m interested in computer architecture, RTL/ASIC/SoC design, FPGA and embedded systems, semiconductor engineering, and research where strong measurement meets thoughtful design.